C8051F130-GQR

C8051F130-GQR, Silicon Labs Microcontroller (MCU), 0.3V, 100 mA, 100TQFP

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Price:: US $1.00~50.00 / piece [Get Latest Price]

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PartNumber:: C8051F130-GQR

Brand:: Silicon Laboratories - SLAB | Pack: DIP | D/C: 11+

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Products Upload time: 2012-01-19

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Part Number:C8051F130-GQR
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Product Summary

The C8051F130-GQR is a Mixed Signal ISP Flash MCU. With on-chip VDD monitor, Watchdog Timer, and clock oscillator, the C8051F130-GQR is truly stand-alone System-on-a-Chip solutions. All analog and digital peripherals are enabled/disabled and configured by user firmware. The C8051F130-GQR can be reprogrammed even in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware.On-board JTAG debug circuitry allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the production MCU installed in the final application. This debug system supports inspection and modification of memory and registers, setting breakpoints, watchpoints, single stepping, run and halt commands. All analog and digital peripherals are fully functional while debugging using JTAG.

Parametrics

C8051F130-GQR absolute maximum ratings: (1)Ambient temperature under bias: -55 to 125 °C; (2)Storage Temperature -65 to 150 °C; (3)Voltage on any Pin (except VDD and Port I/O) with respect to DGND: -0.3 VDD +0.3V; (4)Voltage on any Port I/O Pin or /RST with respect to DGND: -0.3 to 5.8 V; (5)Voltage on VDD with respect to DGND: -0.3 to 4.2 V; (6)Maximum Total current through VDD, AV+, DGND, and AGND: 800 mA; (7)Maximum output current sunk by any Port pin: 100 mA; (8)Maximum output current sunk by any other I/O pin: 50 mA; (9)Maximum output current sourced by any Port pin: 100 mA; (10)Maximum output current sourced by any other I/O pin: 50 mA.

Features

C8051F130-GQR features: (1)On-chip debug circuitry facilitates full-speed, nonintrusive in-circuit/in-system debugging; (2)Provides breakpoints, single-stepping, watchpoints, stack monitor; inspect/modify memory and registers; (3)Pipelined Instruction Architecture; Executes 70% of Instruction Set in 1 or 2 System Clocks; (4)Programmable 16-bit Counter/Timer Array with 6 Capture/Compare Modules.