P87C554SFAA

Product Summary

The P87C554SFAA is a Single-Chip 8-Bit Microcontroller. It is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The P87C554SFAA has the same instruction set as the 80C51. The P87C554SFAA contains a 16k×8 non-volatile EPROM, a 512×8 read/write data memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters , an additional 16-bit timer coupled to capture and compare latches, a 15-source, four-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART and I2C-bus), a “watchdog” timer and on-chip oscillator and timing circuits. For systems that require extra capability, the P87C554SFAA can be expanded using standard TTL compatible memories and logic.

Parametrics

P87C554SFAA absolute maximum ratings: (1)Storage temperature range: –65℃ to +150℃; (2)Voltage on EA/VPP to VSS: –0.5 to +13 V; (3)Voltage on any other pin to VSS: –0.5 to +6.5V; (4)Input, output DC current on any single I/O pin: 5.0mA; (5)Power dissipation (based on package heat transfer limitations, not device power consumption): 1.0 W

Features

P87C554SFAA features: (1)80C51 central processing unit; (2)16k×8 EPROM expandable externally to 64k bytes; (3)An additional 16-bit timer/counter coupled to four capture registers and three compare registers; (4)Two standard 16-bit timer/counters; (5)512×8 RAM, expandable externally to 64k bytes; (6)Capable of producing eight synchronized, timed outputs; (7)A 10-bit ADC with eight multiplexed analog inputs; (8)Fast 8-bit ADC option; (9)Two 8-bit resolution, pulse width modulation outputs; (10)Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs; (11)I2C-bus serial I/O port with byte oriented master and slave functions; (12)On-chip watchdog timer; (13)Extended temperature ranges; (14)Full static operation ?0 to 16 MHz; (15)Operating voltage range: 2.7 V to 5.5 V (0 to 16 MHz) and 4.5 V to 5.5 V (16 to 33 MHz); (16)Three security bits; (17)Encryption array ?64 bytes; (18)4 level priority interrupt; (19)15 interrupt sources; (20)Full-duplex enhanced UART; (21)Framing error detection; (22)Automatic address recognition; (23)Power control modes; (24)Clock can be stopped and resumed; (25)Idle mode; (26)Power down mode; (27)Second DPTR register; (28)ALE inhibit for EMI reduction; (29)Programmable I/O pins; (30)Wake-up from power-down by external interrupts; (31)Software reset; (32)Power-on detect reset; (33)ADC charge pump disable; (34)ONCE mode; (35)ADC active in Idle mode.

Diagrams