P87C592EFA

Product Summary

The P87C592EFA is a Single-chip 8-bit microcontroller with CAN controller, derived from the 80C51 microcontroller family. The P87C592EFA uses the powerful 80C51 instruction set and includes the successful PeliCAN functionality of the SJA1000 CAN controller from Philips Semiconductors. The fully static core provides extended power save provisions as the oscillator can be stopped and easily restarted without loss of data. The improved internal clock prescaler of 1:1 achieves a 500 ns instruction cycle time at 12 MHz external clock rate.

Parametrics

P87C592EFA absolute maximum ratings: (1)VDD Voltage on VDD to VSS and SCL, SDA to VSS: -0.5 to +6.5 V; (2)VI Input voltage on any other pin to VSS: -0.5 to VDD + 0.5 V; (3)II, IO Input/output current on any I/O pin: 5mA; (4)Ptot Total power dissipation: 1.0 W; (5)Tstg Storage temperature range: -65 to +150℃; (6)Tamb Operating ambient temperature range: -40℃ to +85℃; (7)VPP Voltage on EA/VPP to VSS: -0.5V to +13V.

Features

P87C592EFA features: (1)Full static 80C51 Central Processing Unit available as OTP, ROM and ROMless; (2)16 Kbytes internal Program Memory expandable externally to 64 Kbytes; (3)512 bytes on-chip Data RAM expandable externally to 64 Kbytes; (4)Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture & compare); (5)10-bit ADC with 6 multiplexed analog inputs with fast 8-bit ADC option; (6)Two 8-bit resolution, Pulse Width Modulated outputs; (7)32 I/O port pins in the standard 80C51 pinout; (8)I2C-bus serial I/O port with byte oriented master and slave functions; (9)On-chip Watchdog Timer T3; (10)Extended temperature range: -40 to +85℃; (11)Accelerated (prescaler 1:1) instruction cycle time 500 ns @ 12MHz; (12)Operation voltage range: 5 V ?5%; (13)Security bits: ROM version has 2 bits; (14)OTP/EPROM version has 3 bits; (15)32 bytes Encryption array; (16)4 level priority interrupt, 15 interrupt sources; (17)Full-duplex enhanced UART with programmable Baudrate Generator; (18)Power Control Modes:; (19)Clock can be stopped and resumed; (20)Idle Mode; (21)Power-down Mode; (22)ADC active in Idle Mode; (23)Second DPTR register; (24)ALE inhibit for EMI reduction; (25)Programmable I/O port pins (pseudo bi-directional, push-pull, high impedance, open drain); (26)Wake-up from Power-down by external interrupts; (27)Software reset bit (AUXR1.5); (28)Low active reset pin; (29)Power-on detect reset; (30)Once mode.

Diagrams